This work investigates how far classical simulation can be pushed using hybrid parallelism and GPU acceleration. The focus is on identifying bottlenecks and evaluating simulator backends under realistic workloads using reproducible benchmarking.

Key Research Areas

• Hybrid parallelism: MPI across nodes + OpenMP within a node
• GPU offloading and profiling-driven optimization
• Benchmarking methodology: circuit workloads, scaling behavior, and accuracy metrics

At Instituto Superior Técnico, the PIC2 is a capstone-style project that bridges master's coursework and the independent research carried out during the thesis. This report establishes my benchmarking methodology for GPU-accelerated quantum circuit simulation and provides baseline performance and accuracy results that inform my thesis direction.

What's Inside

• Reproducible benchmarking setup — circuit workloads, input states, shot selection, and evaluation workflow.
• Simulator + backend comparison — CPU vs GPU execution across modern toolchains (e.g., Qiskit Aer / CUDA-Q) with scaling analysis.
• Performance + correctness metrics — runtime together with fidelity and distance-based errors (e.g., Frobenius norm, L2).
• Noise experiments — standard noise channels to quantify accuracy degradation and runtime impact under realistic conditions.

How It Informed My Thesis

PIC2 served as the foundation for my thesis by defining a reproducible benchmarking methodology (workloads, metrics, and experimental workflow) and generating baseline CPU/GPU results under both ideal and noisy runs. The observed scaling trends and accuracy degradation directly shape the thesis scope, the simulator/backends I prioritize, and the larger-scale experiments I plan to run next.

• Thesis next steps: extend to larger-scale GPU and distributed runs and broaden comparisons to additional simulators and algorithms.

Resources